I am a Lecturer of the Institute of Computer Software, Northeastern University, China. I obtained my Ph.D., Master's and Bachalor's Degress from Northeastern University, in 2010, 2005 and 2002 respectively.

I visited the IT department of Uppsala University Sweden during Mar. 2010 to Apr. 2010, under Prof. Wang Yi's supervision. I visited the Real-Time Embedded Systems Group of Hong Kong University of Science and Technology during Feb. 2007 to Mar. 2008, under Prof. Zonghua Gu's supervision.

Research

My research area is real-time embedded systems, and my research interest are timing analysis of multicore real-time systems, modeling and verification of real-time embedded systems.

Projects & Experiences

1. WCET Analysis Multicore Real-Time Software

   We present approach,which combines abstract interpretation and model checking, to solve the problem of WCET estimation of MULTICORE software with shared memory buses. The work was published in RTSS 2010 (see the paper below), and turns out to be a timing analyzer --- McAiT, which can be obtained via the link: http://www.neu-rtes.org/mcait

2. Research on Real-Time Scheduling Issues and Operating System Technology of Reconfigurable Computing Systems (China National 863 Program), Northeastern university, 2008.03 – 2010.06
   

   The main purpose of this project is to design a platform of a general purpose computing system leveraging dynamic reconfigurable devices. My work is on scheduler design and SW/HW communication mechanisms. We are now extending the Linux scheduler to co-schedule both SW and HW tasks. Currently HW and SW tasks in our system communicate via a mechanism extended from Linux message queue.

3. Buffer Optimization and Code Synthesis of SDF Models, HKUST, 2007

In this research, we used model checking techniques to do buffer optimization of SDF models, and designed a code synthesis mechanism with the objective to minimize runtime overhead. Responsibilities involved designing a generator for SPIN and NuSMV models, and extending S-Graph to do efficient code synthesis.

4. The Embedded Software Platform for the Large-Scale Machine Supervision Systems (Supported by National 863 Program of China), Northeastern University, 2003 - 2005
   
   This project aimed at providing a platform to facilitate the development of software in state-monitoring and error-detection devices in large scale electro-mechanical machines. My work mainly focused on real-time scheduling issues. We first extracted some requirements on the scheduling policies from our real system; then we selected Deadline Monotonic (DM) as the basic scheduling algorithm in this system, and extended traditional DM schedulability test by considering resource sharing via PCP and scheduling and context switch overheads. Experiments were done on the μC/OS-II real-time kernel.

Publications

1. Mingsong Lv, Wang Yi, NanGuan, Ge Yu. "Combining Abstract Interpretation with Model Checking for Timing Analysis of Multicore Real-Time Software", in the 31st IEEE Real-Time Systems Symposium (RTSS), San Diego, CA, US, 2010.
2. Mingsong Lv, Nan Guan, Wang Yi, Qingxu Deng, Ge Yu. "Efficient Instruction Cache Analysis with Model Checking", in the Work-in-Progress Session of the 17th IEEE Real-Time and Embedded Technology and Applications Symposium, 2010.
3. Mingsong Lv, Nan Guan, Qingxu Deng, Ge Yu, Wang Yi. "Static Worst-Case Execution Time Analysis of the uC/OS-II Real-Time Kernel", in Frontiers of Computer Science in China, Number 3, September, 2010.
4. Mingsong Lv, Nan Guan, Yi Zhang, Rui Chen, Qingxu Deng, Ge Yu, Wang Yi, “WCET Analysis of the uC/OS-II Real-Time Kernel”, accepted to the 7th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2009).
5. Mingsong Lv, Nan Guan, Yi Zhang, Qingxu Deng, Ge Yu, Jianming Zhang, “A Survey of WCET Analysis of Real-Time Operating Systems”, in Proc. of the 6th IEEE International Conference on Embedded Software and Systems (ICESS 2009).
6. Mingsong Lv, Zonghua gu, Nan Guan, Qingxu Deng, Ge Yu, “Performance Comparison of Techniques on Static Path Analysis of WCET”, in Proc. of the 6th IEEE/IFIP International Conference on Embedded and Ubiquitous Computing (EUC 2008).
7. Mingsong Lv, Qingxu Deng, Nan Guan, Yaming Xie, Ge Yu, “ARMISS: An Instruction Set Simulator for the ARM Architecture”, in Proc. of the 5th International Conference on Embedded Software and Systems (ICESS 2008).
8. Mingsong Lv, Ying Guo, Nan Guan, Qingxu Deng, “RTNoC: A Simulation Tool for Real-Time Communication Scheduling on Networks-on-Chips”, in Proc. of the 2008 International Conference on Computer Science and Software Engineering (CSSE 2008).
9. Nan Guan, Zonghua Gu, Mingsong Lv, Qingxu Deng, Ge Yu, “Exact Schedulability Analysis of Global Scheduling on Multiprocessor Platforms by Symbolic Model Checking”, in Proc. of the 11th IEEE International Symposium on Object-Oriented Real-Time Systems (ISORC 2008).
10. Qingxu Deng, Fanxin Kong, Nan Guan, Mingsong Lv, Wang Yi, “On-line Placement of Real-Time Tasks on 2D Partially Run-time Reconfigurable FPGAs”, in Proc. of the 5th IEEE International Symposium on Embedded Computing (SEC 2008).
11. Zonghua Gu, Mingxuan Yuan, Nan Guan, Mingsong Lv, Qingxu Deng, Ge Yu, “Static Scheduling and Software Synthesis of Datafow Models with Symbolic Model-Checking”, in Proc. of the 28th Real-Time Systems Symposium (RTSS 2007).
12. Nan Guan, Mingsong Lv, Qingxu Deng, Ge Yu, “A Real-Time Scheduling Algorithm with Buffer Optimization for Embedded Signal Processing Systems”, in Proc. of the 4th IEEE International symposium on Embedded Computing (SEC 2007).
13. Qingxu Deng, Mingsong Lv, Ge Yu, “Selecting a Scheduling Policy for Embedded Real-Time Monitor and Control Systems”, in Proc. of the 1st International Conference on Embedded Systems and Software (ICESS 2004).
14. Dan Wang, Ge Yu, Mingsong Lv, Baoyan Song, Derong Shen, Guoren Wang, “An Ant Algorithm Based Dynamic Routing Strategy for Mobile Agents”, in Proc. of the 5th Asian-Pacific Web Conference (APWeb 2003).